计算机体系结构与安全 英文版PDF|Epub|txt|kindle电子书版本下载

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1 Introduction to Computer Architecture and Security1

1.1 History of Computer Systems3

1.1.1 Timeline ofComputer History5

1.1.2 Timeline of Internet History15

1.1.3 Timeline of Computer Security History28

1.2 John von Neumann Computer Architecture34

1.3 Memory and Storage36

1.4 Input/Output and Network Interface37

1.5 Single CPU and Multiple CPU Systems38

1.6 Overview of Computer Security41

1.6.1 Confidentiality41

1.6.2 Integrity42

1.6.3 Availability42

1.6.4 Threats43

1.6.5 Firewalls43

1.6.6 Hacking andAttacks44

1.7 Security Problems in Neumann Architecture46

1.8 Summary48

Exercises48

References50

2 Digital Logic Design51

2.1 Concept of Logic Unit51

2.2 Logic Functions and Truth Tables52

2.3 Boolean Algebra54

2.4 Logic Circuit Design Process55

2.5 Gates and Flip-Flops56

2.6 Hardware Security58

2.7 FPGA and VLSI58

2.7.1 Design ofan FPGA Biometric Security System59

2.7.2 A RIFD Student Attendance System59

2.8 Summary65

Exercises67

References67

3 Computer Memory and Storage68

3.1 A One Bit Memory Circuit68

3.2 Register,MAR,MDR and Main Memory70

3.3 Cache Memory72

3.4 Virtual Memory74

3.4.1 Paged Virtual Memory75

3.4.2 Segmented Virtual Memory75

3.5 Non-Volatile Memory76

3.6 External Memory77

3.6.1 HardDisk Drives78

3.6.2 TertiaryStorageandOff-LineStorage78

3.6.3 Serial Advanced Technology Attachment(SATA)79

3.6.4 Small Computer System Interface(SCSI)80

3.6.5 SerialAttached SCSI(SAS)81

3.6. 6 Network-A ttached Storage(NAS)82

3.6.7 Storage Area Network(SAN)83

3.6.8 Cloud Storage85

3.7 Memory Access Security86

3.8 Summary88

Exercises89

References89

4 Bus and Interconnection90

4.1 System Bus90

4.1.1 AddressBus91

4.1.2 Data Bus93

4.1.3 Control Bus93

4.2 Parallel Bus and Serial Bus95

4.2.1 Parallel Buses and Parallel Communication95

4.2.2 Serial Bus and Serial Communication96

4.3 Synchronous Bus and Asynchronous Bus107

4.4 Single Bus and Multiple Buses109

4.5 Interconnection Buses110

4.6 Security Considerations for Computer Buses111

4.7 A Dual-Bus Interface Design112

4.7.1 Dual-channel Architecture113

4.7.2 Triple-ChannelArchitecture114

4.7.3 A Dual-Bus Memory Interface115

4.8 Summary115

Exercises117

References117

5 I/O and Network Interface118

5.1 Direct Memory Access118

5.2 Interrupts120

5.3 Programmed I/O121

5.4 USB and IEEE 1394122

5.4.1 USB Advantages123

5.4.2 USB Architecture123

5.4.3 USB Version History124

5.4.4 USBDesign andArchitecture125

5.4.5 USB Mass Storage127

5.4.6 USB Interface Connectors128

5.4.7 USB Connector Types130

5.4.8 USB Power and Charging133

5.4.9 IEEE 1394136

5.5 Network Interface Card136

5.5.1 Basic NIC Architecture137

5.5.2 Data Transmission138

5.6 Keyboard,Video and Mouse(KVM) Interfaces139

5.6.1 Keyboards140

5.6.2 Video Graphic Card140

5.6.3 Mouses140

5.7 Input/Output Security140

5.7.1 Disable Certain Key Combinations141

5.7.2 Anti-Glare Displays141

5.7.3 Adding Password to Printer141

5.7.4 Bootable USB Ports141

5.7.5 Encrypting Hard Drives141

5.8 Summary141

Exercises142

References143

6 Central Processing Unit144

6.1 The Instruction Set144

6.1.1 Instruction Classifications144

6.1.2 Logic Instructions145

6.1.3 Arithmetic Instructions145

6.1.4 Intel64/32 Instructions147

6.2 Registers153

6.2.1 General-Purpose Registers153

6.2.2 Segment Registers155

6.2.3 EFLAGS Register156

6.3 The Program Counter and Flow Control158

6.3.1 Intel Instruction Pointer158

6.3.2 Interrupt and Exception159

6.4 RISC Processors161

6.4.1 History162

6.4.2 Architecture and Programming162

6.4.3 Performance163

6.4.4 Advanrages and Disadvantages163

6.4.5 Applications164

6.5 Pipelining164

6.5.1 Different Types ofPipelines164

6.5.2 Pipeline Performance Analysis165

6.5.3 Data Hazard166

6.6 CPU Security166

6.7 Virtual CPU168

6.8 Summary169

Exercises170

References170

7 Advanced Computer Architecture172

7.1 Multiprocessors172

7.1.1 Multiprocessing172

7.1.2 Cache173

7.1.3 Hyper-Threading174

7.1.4 Symmetric Multiprocessing175

7.1.5 Multiprocessing Operating Systems175

7.1.6 The Future ofMultiprocessing176

7.2 Parallel Processing177

7.2.1 History ofParallel Processing177

7.2.2 Flynn's Taxonomy178

7.2.3 Bit-Level Parallelism178

7.2.4 Instruction-Level Parallelism179

7.2.5 Data-Level Parallelism179

7.2.6 Task-Level Parallelism179

7.2.7 Memory in ParallelProcessing180

7.2.8 Specialized Parallel Computers181

7.2.9 The Future ofParalielProcessing182

7.3 Ubiquitous Computing182

7.3.1 Ubiquitous Computing Development183

7.3.2 Basicforms of Ubiquitous Computing184

7.3.3 Augmented Reality185

7.3.4 Mobile Computing186

7.4 Grid.Distributed and Cloud Computing187

7.4.1 Characteristics of Grid Computing187

7.4.2 TheAdvantages andDisadvantages ofGrid Computing188

7.4.3 Distributed Computing189

7.4.4 Distributed Systems189

7.4.5 Parallel and Distributed Computing190

7.4.6 Distributed Computing Architectures190

7.4.7 Cloud Computing192

7.4.8 TechnicalAspects ofCloud Computing193

7.4.9 Security Aspects of Cloud Computing194

7.4.1 0 Ongoing and Future Elements in Cloud Computing195

7.4.1 1 Adoption ofCloud Computing Industry Drivers196

7.5 Internet Computing197

7.5.1 Internet Computing Concept and Model198

7.5.2 Benefit ofInternet Computing for Businesses199

7.5.3 Examples ofInternet Computing201

7.5.4 Migrating Internet Computing202

7.6 Virtualization203

7.6.1 Types of Virtualization203

7.6.2 History of Virtualization205

7.6.3 Virtualization Architecture205

7.6.4 Virtual Machine Monitor207

7.6.5 Examples of Virtual Machines207

7.7 Biocomputers209

7.7.1 Biochemical Computers209

7.7.2 Biomechanical Computers209

7.7.3 Bioelectronic Computers210

7.8 Summary211

Exercises212

References214

8 Assembly Language and Operating Systems216

8.1 Assembly Language Basics217

8.1.1 Numbering Systems217

8.1.2 The Binary Numbering System and Base Conversions219

8.1.3 The Hexadecimal Numbering System220

8.1.4 Signedand UnsignedNumbers221

8.2 Operation Code and Operands223

8.3 Direct Addressing225

8.4 Indirect Addressing225

8.5 Stack and Buffer Overflow226

8.5.1 Calling Procedures Using CALL and RET(Return)228

8.5.2 Exploiting Stack Buffer Overflows229

8.5.3 Stack Protection231

8.6 FIFO and M/M/1 Problem232

8.6.1 FIFO Data Structure232

8.6.2 M/M/1 Model233

8.7 Kernel,Drivers and OS Security234

8.7.1 Kernel234

8.7.2 BIOS235

8.7.3 Boot Loader236

8.7.4 Device Drivers237

8.8 Summary238

Exercises239

References240

9 TCP/IP and Internet241

9.1 Data Communications241

9.1.1 Signal,Data.and Channels242

9.1.2 Signal Encoding and Modulation243

9.1.3 Shannon Theorem244

9.2 TCP/IP Protocol244

9.2.1 Network Topology245

9.2.2 Transmission Control Protocol(TCP)246

9.2.3 The User Datagram Protocol(UDP)247

9.2.4 Internet Protocol(IP)247

9.3 Network Switches248

9.3.1 Layer 1 Hubs248

9.3.2 Ethernet Switch249

9.4 Routers250

9.4.1 History ofRouters251

9.4.2 Architecture251

9.4.3 Internet Protocol Version 4 (IPv4)253

9.4.4 Internet Protocol Version 6(IPv6)254

9.4.5 Open Shortest Path First254

9.4.6 Throughput and Delay256

9.5 Gateways257

9.6 Wireless Networks and Network Address Translation (NAT)258

9.6.1 Wireless Networks258

9.6.2 Wireless Protocols260

9.6.3 WLANHandshaking,War Driving,and WLANSecurity261

9.6.4 Security Measures to Reduce Wireless Attacks263

9.6.5 The Future of Wireless Network263

9.6.6 Network Address Translation264

9.6.7 Environmental and Health Concerns Using Cellular and Wireless Devices265

9.7 Network Security267

9.7.1 Introduction268

9.7.2 Firewall Architecture271

9.7.3 Constraint and Limitations ofFirewall273

9.7.4 Enterprise Firewalls274

9.8 Summary275

Exercises276

9.9 Virtual Cyber-Security Laboratory277

References278

10 Design and Implementation:Modifying Neumann Architecture280

10.1 Data Security in Computer Systems280

10.1.1 Computer Security281

10.1.2 Data Security and Data Bleaches282

10.1.3 Researches in Architecture Security283

10.2 Single-Bus View of Neumann Architecture284

10.2.1 John von Neumann Computer Architecture284

10.2.2 Modified Neumann Computer Architecture285

10.2.3 Problems Exist in John Neumann Model286

10.3 A Dual-Bus Solution286

10.4 Bus Controller288

10.4.1 Working Mechanism of the Bus Controller288

10.4.2 Co-processor Board289

10.5 Dual-Port Storage292

10.6 Micro-Operating System292

10.7 Summary293

Exercises294

10.8 Projects295

References295

Appendix A Digital Logic Simulators297

A.1 CEDAR Logic Simulator297

A.2 Logisim298

A.3 Digital Logic Simulator v0.4 298

A.4 Logicly299

Appendix B Computer Security Tools300

B.1 Wireshark(Ethereal)300

B.2 Metasploit300

B.3 Nessus301

B.4 Aircrack301

B.5 Snort301

B.6 Cain and Abel302

B.7 BackTrack302

B.8 Netcat302

B.9 Tcpdump302

B.10 John the Ripper303

Appendix C Patent Application:Intrusion-Free Computer Architecture for Information and Data Security304

C.1 Background of the Invention304

C.1.1 John von Neumann ComputerArchitecture Model305

C.1.2 Modified Neumann Computer Architecture305

C.1.3 Problems Existed in the John Neumann Model307

C.1.4 The Goal ofthe Invention307

C.2 Field of Invention308

C.3 Detailed Description of the Invention308

C.4 Claim310

Index313